1. Field of the Invention
The invention relates to a frequency synthesizer with a double PLL array, which has a first counter and a second counter, each in a respective feedback,branch, for selectively setting the frequency. Such a double PLL array (PLL stands for phase-locked loop) is used for instance in mobile radio technology for frequency synthesis in mobile radio units. The basic layout of the essential elements of a double PLL is described, for instance in the article by Wilfried Blasner, xe2x80x9cFrequenzsynthesizer fxc3xcr Mobilfunkxe2x80x9d [Frequency Synthesizers for Mobile Radio], Elektronik [Electronics], 10/1996, pp. 108-112, especially FIG. 2. Here one PLL array acts as a high-frequency PLL, hereinafter called an RF-PLL, and the other acts as an intermediate-frequency PLL, hereinafter called an IF-PLL. The various frequencies for transmitting and receiving are set with the double PLL array, as are the channel-dependent frequencies. To that end, a first mixing stage cooperating with a first local oscillator and a second mixing stage cooperating with a second local oscillator are present in the receiver part.
For use in the various mobile radio systems, the terminal mobile radio units, also generally known as radio terminals (RT), are adapted to the specific frequency ranges of the mobile radio systems, which are called bands. That is, the frequency synthesizer of a radio terminal in one mobile radio system generates different frequencies from the frequency synthesizer of another radio terminal.
Known mobile radio systems also differ in other operating parameters as well, such as the reference frequency, channel frequency, and the like. Thus one radio terminal can be used only within a particular mobile radio system.
One widely used mobile radio system in Europe is the GSM system (for Groupe Speciale Mobile; D1/D2 network), which is operated in a frequency range of approximately 900 MHz.
Another mobile radio system in the frequency range of about 1800 MHz is in use, under the designation DCS 1800 (Digital Cellular System 1800). It is indeed known to combine the GSM infrastructure with the DCS 1800 infrastructure, which is known as dual band, so that an overall economical common network can be built up. Nevertheless, for each standard, its own radio terminals have to be used.
This is all the more true for mobile radio systems that differ in still other operating parameters as well, such as the DECT standard for cordless telephones. To the extent that systems can be used for both the DECT standard and some other standard, for example, they are called dual-mode systems.
It is accordingly an object of the invention to provide a frequency synthesizer for a radio terminal, which overcomes the above-mentioned disadvantages of the prior art devices of this general type, which can be used in mobile radio systems with different network frequencies and/or different operating parameters and being easy to use.
With the foregoing and other objects in view there is provided, in accordance with the invention, a frequency synthesizer for a radio terminal, including: a clock outputting a clock signal; a first phase-locked loop for generating a high-frequency signal, having: a first frequency divider receiving the high-frequency signal; a second frequency divider receiving the clock signal; and a memory connected to the first frequency divider and storing divider ratios; a second phase-locked loop for generating an intermediate-frequency signal, having: a first frequency divider receiving the intermediate frequency signal; a second frequency divider receiving the clock signal; and a memory connected to the first frequency divider and storing further divider ratios; and the memory of the first phase-locked loop coupled to the memory of the second phase-locked loop.
The invention has the advantage that as a function of control data that are transmitted from a base station, a switchover to the frequency range or the pertinent operating parameters of the applicable mobile radio system is done automatically, without action by the user. The user can therefore use the radio terminal as a dual-band or dual-mode radio terminal in the same way, within range of either one mobile radio system or another, without having to bother with adaptation or switchover.
It is accordingly a fundamental concept of the invention that for basic initialization, the requisite divider values for the frequency dividers of the double PLL are transmitted from the base station to the radio terminal and stored in memory there. In later operation, basically only a single control value is transmitted from the base station to the radio terminal, and by way of this value the selection of stored divider values and in addition, optionally, the modification and switchover of other operating parameters, are brought about. Any change in the divider values for the high-frequency portion of the double PLL (RF-PLL) automatically, by suitable linkage with the frequency dividers of the intermediate-frequency portion of the double PLL (IF-PLL), brings about the associated change in the divider values of the IF-PLL.
The storage of the divider values in memory is done in the simplest case in individual registers, which are selected via a multiplexer under control by the base station. In principle, however, any other kind of memory and memory triggering are suitable for arriving at the required divider values and making the required logical linkages.
In a preferred embodiment of the invention, for using the radio terminal in dual-band fashion for the GSM and DCS 1800 mobile radio systems together, three registers for holding different counter values are built into the PLL counter of the intermediate-frequency portion. In this way, three fundamental frequencies can be generated, which are sufficient for operating the radio terminal in accordance with both mobile radio standards.
For use in the dual mode, it is especially advantageous that further registers for holding different divider values are present in the RF-PLL, by way of which registers the reference frequency (channel frequency) of one mobile radio system can be set in the RF-PLL, and that switching elements by which the system-specific operating parameters can be switched over or set are triggerable via the input register.
In accordance with an added feature of the invention, the second phase-locked loop has a selection device with input terminals for selecting the further divider ratios from the memory of the second phase-locked loop, and the selection device is coupled to the memory of the first phase-locked loop.
In accordance with an additional feature of the invention, the memory of the first phase-locked loop has a register with bit positions, and a content of the bit positions of the register are received by the input terminals of the selection device.
In accordance with another feature of the invention, the first phase-locked loop has a further memory connected to the second frequency divider of the first phase-locked loop, and the further memory receives additional divider ratios for the second frequency divider of the first phase-locked loop.
In accordance with a further added feature of the invention, the first phase-locked loop has a further selection device with input terminals for selecting the additional divider ratio to be received by the second frequency divider of the first phase-locked loop, and the further selection device is coupled to the memory of the first phase-locked loop.
In accordance with a further additional feature of the invention, the memory of the first phase-locked loop has a register with bit positions, the input terminals of the further selection device receives the content of the bit positions of the register.
In accordance with yet another feature of the invention, the memory of the first phase-locked loop and the memory of the second phase-locked loop each have one shift register into which respective frequency divider data is serially written.
With the foregoing and other objects in view there is also provided, in accordance with the invention, a frequency synthesizer for a radio terminal, including: a clock outputting a clock signal; a phase-locked loop for generating a high-frequency signal, having: a first frequency divider receiving the high-frequency signal; a second frequency divider receiving the clock signal; a first memory connected to the first frequency divider and storing divider ratios; and a second memory connected to the second frequency divider and to the first memory, and the second memory storing further divider ratios.
In accordance with an added feature of the invention, the phase-locked loop has a selection device with input terminals for selecting the further divider ratios of the second memory to be received by the second frequency divider, and the selection device is coupled to the first memory.
In accordance with an additional feature of the invention, the first memory has a register with bit positions and the input terminals of the selection device receives the content of the bit positions of the register.
In accordance with a concomitant feature of the invention, the first memory and the second memory each have one shift register into which respective frequency divider data is serially written.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a frequency synthesizer for a radio terminal, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.